Memory storage devices, data storage devices, memory devices, memories, and storage devices, are hereinafter referred to simply as “storage devices”. Example storage devices include removable devices, such as memory cards, and non-removable devices, such as embedded memory. Embedded devices and removable devices that are attached to a host are powered on and use power even when they are not accessed by the host. In some systems, such as cameras and cell phones, short periods of activity are followed by long periods of inactivity. The idle time power has a large impact on the total amount of energy used by such a device in a battery operated environment, and hosts usually have strict limits on the maximum allowed idle power consumption of a memory device.
Data storage devices that comply with the SATA specifications must support low power modes. Two such modes are the SATA SLUMBER and PARTIAL SLUMBER modes, which place the SATA interface into a low power mode, after which the storage device finishes any necessary processing and flash memory management activities before entering what is referred to as deep power down mode, or DPDM. In this mode, the controller's processor and the flash memories are idle until the host brings the SATA interface back into regular mode. It takes 10 microseconds to recover from PARTIAL SLUMBER mode and 10 milliseconds to recover from SLUMBER mode.
One disadvantage of the SATA SLUMBER modes is that both modes require out of band (OOB) commands to return to normal operation. The SATA physical interface, or “PHY”, has to be partially powered up to accept these commands, which results in significant power consumption even in SLUMBER mode. This power consumption is a problem for embedded SATA devices, because the DPDM power consumption (e.g., 10 mW) is still higher than the limit that many host device manufacturers specify (e.g., 1 mW.)
One conventional solution to this problem is to turn off power to the memory after a period of inactivity on the host interface and to turn power on again when a command is received. This method has no coordination with the host, and causes unexpected response delays when a command was received while power to the memory is off. This method is less useful now, because modern memory in multiple die products like solid state drives (SSDs) and compact flash (CF) takes a long time to re-initialize, e.g., in the order of tens or even hundreds of milliseconds. Such unexpected delays are no longer acceptable to hosts expecting high performance.
Another conventional solution to this problem is described in the CFast standard specification (available from http://www.compactflash.org/), which contains a protocol called physical layer sleep (PHYSLP) that enables the storage device to turn off its PHY. The way that the PHYSLP protocol operates is that the host asserts a hardware signal to the storage device telling the storage device that it may turn off its PHY completely, to save power. The host may turn off its own PHY also at the same time, doubling the power savings. Before the host tries to access the storage device again, the host de-asserts this signal; the storage device is required to turn on its PHY within a predefined time limit (10 milliseconds in the v1.0 CFast specification). This method also has disadvantages, however. While the PHY of a storage device may consume a certain amount of power, the amount of power being consumed by the memory within the storage device is more and more significant as memory capacities increase. The PHYSLP protocol does not address or reduce power consumption of the memory within the storage device, but only addresses power consumption by the PHY of the storage device.
Accordingly, in light of these disadvantages associated with conventional solutions to the problem of how to reduce power consumption by un-accessed memory storage devices, there exists a need for methods, systems, and computer readable media for advanced power management for SATA-based storage devices.